By Jane Sales
Have a look within Symbian OS with an under-the-hood view of Symbian's innovative new real-time telephone kernel
* Describes the functioning of the hot real-time kernel, in order to develop into ubiquitious on Symbian OS telephones within the subsequent 5-10 years
* Will gain the base-porting engineer through offering a extra reliable knowing of the OS being ported
* comprises an in-depth clarification of ways Symbian OS drivers paintings. machine drivers have replaced significantly with the creation of a unmarried code - this booklet is helping these changing them to the recent kernel
* The e-book has wide attraction and is suitable to all who paintings with Symbian OS at a low point, no matter what Symbian OS they're concentrating on
* Written via the engineers who truly designed and outfitted the real-time kernel
Read Online or Download Symbian OS Internals: Real-time Kernel Programming (Symbian Press) PDF
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Extra resources for Symbian OS Internals: Real-time Kernel Programming (Symbian Press)
2 shows a typical System-on-Chip design. Each sub-component within the SoC is an intellectual property (IP) block. The blocks are linked to interconnecting buses through industry standard interfaces. The IP blocks can be licensed from many sources. The most well known IP licensing company is ARM Ltd, who license ARM CPU cores. The example SoC is driven by an ARM 926 CPU for Symbian OS, and a DSP for multimedia codecs. These two cores are both masters on the system bus, which is a high-speed, low-latency, 32-bit wide bus, connected to the DRAM controller.
The speed of the timer clock source is not essential to Symbian OS, but somewhere between 32 kHz and 1 MHz is common. 5). The preferred hardware implementation is a free-running 32-bit counter coupled with a set of 32-bit match registers to generate the timer interrupts. They enable simple software schemes for anti-jitter, idle tick suppression and proﬁling. Self-reloading countdown timers are an alternative hardware option, but they are less ﬂexible. 5 MATCH 0 = MATCH 1 = MATCH 2 = High-speed timer with three match registers 36 HARDWARE FOR SYMBIAN OS The normal operation of the millisecond timer with match registers is straightforward.
The memory model provides four different implementations – moving, multiple, direct and emulator. I will discuss these in more depth in Chapter 7, Memory Models. The CPU layer is for code that differs according to the processor that Symbian OS is running on; this is where assembler code belongs. The nanokernel, memory model and Symbian OS kernel all have code in this layer. At the time of writing, Symbian provides three possible CPU layers – X86 (a port to PC hardware), ARM (mobile phones) and Win32 (for the emulator).