Download Systematic Design for Optimisation of Pipelined ADCs by João Goes PDF

By João Goes

This wonderful reference proposes and develops new concepts, methodologies and instruments for designing low-power and low-area CMOS pipelined A/D converters. the duty is tackled by way of following a scientifically-consistent technique. The e-book can also be used as a textual content for complex studying at the topic.

Show description

Read or Download Systematic Design for Optimisation of Pipelined ADCs PDF

Best semiconductors books

Printed Circuits Handbook (McGraw Hill Handbooks)

The World's number 1 consultant to revealed Circuit Boards_Now thoroughly up-to-date with the most recent details on Lead-Free production! the simplest reference within the box for over 30 years, the published Circuits guide equips you with definitive assurance of each side of revealed circuit assemblies_from layout tips on how to fabrication methods.

Power-Switching Converters, Second Edition (Electrical Engineering and Electronics)

After approximately a decade of good fortune due to its thorough assurance, abundance of difficulties and examples, and functional use of simulation and layout, Power-Switching Converters enters its moment variation with new and up to date fabric, completely new layout case reports, and multiplied figures, equations, and homework difficulties.

Technology of Bottled Water, Second Edition

The bottled waters has turn into an important and full of life region of the beverage global, in constructed and constructing international locations around the globe. considering that booklet of the 1st variation in 1998, the has passed through a awesome growth, and this has served to underline the necessity for an obtainable resource of technical information.

Extra info for Systematic Design for Optimisation of Pipelined ADCs

Sample text

3] Joey Doernberg, Hae-Seung Lee and David A. Hodges, “Full-Speed Testing of A/D Converters”, IEEE Journal of Solid-State Circuits, Vol. SC-19, No. 6, pp. 820-827, December 1984. 4] Bang-Sup Song, Seung-Hoon Lee, Michael F. Tompsett, "A 10-b 15-MHz CMOS Recycling Two-Step A/D Converter", IEEE Journal of Solid-State Circuits, Vol. 25, No. 6, pp. 1328-1338, December 1990. -H. Lee, Bang-Sup Song, "Simplified Digital Calibration for Multi-Stage Analog-toDigital Converters", Proc. IEEE International Symposium on Circuits and Systems, pp.

General Design Considerations in Pipelined A/D Converters 15 INL[i] and DNL[i] errors can be computed in a straightforward way. This method is widely used in testing A/D converters rather than traditional static methods. 3]. 6. A digital delay line is required for output synchronisation in order to assure the correct operation. 7. Digital correction logic is often employed in order to relax the specifications of the basic building blocks of the Flash Quantizers as explained further on in this Chapter.

In addition to the self-calibrated system, a front-end input Sample-and-Hold, a 4-bit Flash Quantizer and an extra 5-bit Flash Quantizer were also included, either to have a complete front-end stage of a pipelined ADC or simply for testing purposes. For improved performance fully differential structures were adopted. 13]. The capacitance values of 4 pF and 64 pF for the input and feedback capacitors, respectively, insure that sampled thermal noise is bellow the 16-bit level. Although this structure would reach the target 15-bit of linearity by using an opamp with only 65 dB of DC gain, the same high-speed high-gain opamp was used for this Reference DAC and for the MDAC.

Download PDF sample

Rated 4.01 of 5 – based on 11 votes